µOS++ IIIe Reference 7.0.0
The third edition of µOS++, a POSIX inspired open source framework, written in C++
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initialize-hardware.c
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1/*
2 * This file is part of the µOS++ distribution.
3 * (https://github.com/micro-os-plus)
4 * Copyright (c) 2015 Liviu Ionescu.
5 *
6 * Permission is hereby granted, free of charge, to any person
7 * obtaining a copy of this software and associated documentation
8 * files (the "Software"), to deal in the Software without
9 * restriction, including without limitation the rights to use,
10 * copy, modify, merge, publish, distribute, sublicense, and/or
11 * sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following
13 * conditions:
14 *
15 * The above copyright notice and this permission notice shall be
16 * included in all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
20 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
22 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28#if defined(__clang__)
29#pragma clang diagnostic ignored "-Wempty-translation-unit"
30#endif
31
32// ----------------------------------------------------------------------------
33
34#if defined(__ARM_EABI__)
35
36// ----------------------------------------------------------------------------
37
39#include <cmsis_device.h>
40
41// ----------------------------------------------------------------------------
42
43#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
44extern unsigned int __vectors_start;
45#endif
46
47// ----------------------------------------------------------------------------
48
65void __attribute__((weak))
67{
68 // Call the CSMSIS system initialisation routine.
69 SystemInit ();
70
71#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
72
73 // Set VTOR to the actual address, provided by the linker script.
74 // Override the manual, possibly wrong, SystemInit() setting.
75 SCB->VTOR = (uint32_t) (&__vectors_start);
76 // Ensure all subsequence instructions use the new configuration.
77 __DSB ();
78
79#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
80
81 // The current version of SystemInit() leaves the value of the clock
82 // in a RAM variable (SystemCoreClock), which will be cleared shortly,
83 // so it needs to be recomputed after the RAM initialisations
84 // are completed.
85
86#if defined(OS_INCLUDE_STARTUP_INIT_FP) || defined (__ARM_FP)
87
88 // Normally FP init is done by SystemInit(). In case this is not done
89 // there, it is possible to force its inclusion by defining
90 // OS_INCLUDE_STARTUP_INIT_FP.
91
92 // Enable the Cortex-M4 FPU only when -mfloat-abi=hard or -mfloat-abi=softfp.
93 // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
94
95 // Set bits 20-23 to enable CP10 and CP11 coprocessor.
96 SCB->CPACR |= (0xF << 20);
97
98 // Lazy save.
99 FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
100
101#endif /* defined(OS_INCLUDE_STARTUP_INIT_FP) || defined (__ARM_FP) */
102
103#if defined(OS_DEBUG_SEMIHOSTING_FAULTS)
104
105 SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk;
106
107#endif
108}
109
110// Temporarily disabled, to help identify missing application inits.
111#if 0 || defined(__DOXYGEN__)
125void __attribute__((weak))
127{
128 // Call the CSMSIS system clock routine to store the clock frequency
129 // in the SystemCoreClock global RAM location.
130 SystemCoreClockUpdate ();
131}
132#endif /* 0 || defined(__DOXYGEN__) */
133
134// ----------------------------------------------------------------------------
135
136#endif /* defined(__ARM_EABI__) */
void os_startup_initialize_hardware_early(void)
Initialise hardware early.
void os_startup_initialize_hardware(void)
Initialise hardware.